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Create Time:1970-01-01 08:00:00
File Size:3.37 GB
File Count:421
File Hash:ef43bfd5447f98911c3f45ef02d438e92f6c4b04
| Get Bonus Downloads Here.url | 180 B |
| ~Get Your Files Here !/1. Introduction/1. Welcome!.mp4 | 43.64 MB |
| ~Get Your Files Here !/1. Introduction/1. Welcome!.srt | 4.38 KB |
| ~Get Your Files Here !/1. Introduction/2. Course overview.mp4 | 50.49 MB |
| ~Get Your Files Here !/1. Introduction/2. Course overview.srt | 4.88 KB |
| ~Get Your Files Here !/1. Introduction/3. What is Verilog HDL.mp4 | 17.27 MB |
| ~Get Your Files Here !/1. Introduction/3. What is Verilog HDL.srt | 1.58 KB |
| ~Get Your Files Here !/1. Introduction/4. Understand Abstraction Levels.mp4 | 30.63 MB |
| ~Get Your Files Here !/1. Introduction/4. Understand Abstraction Levels.srt | 3.26 KB |
| ~Get Your Files Here !/1. Introduction/5. Discover the Modern Digital Design Flow.mp4 | 21.16 MB |
| ~Get Your Files Here !/1. Introduction/5. Discover the Modern Digital Design Flow.srt | 3.12 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/1. Basics of Semiconductor Memory.mp4 | 26.82 MB |
| ~Get Your Files Here !/10. Verilog Memory Design/1. Basics of Semiconductor Memory.srt | 2.50 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/2. Action Time - Single Port Async Read SRAM.mp4 | 50.98 MB |
| ~Get Your Files Here !/10. Verilog Memory Design/2. Action Time - Single Port Async Read SRAM.srt | 6.44 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/2.1 ram_sp_async_read.v | 3.38 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/3. Action Time - Single Port Sync Read SRAM.mp4 | 24.78 MB |
| ~Get Your Files Here !/10. Verilog Memory Design/3. Action Time - Single Port Sync Read SRAM.srt | 3.17 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/3.1 ram_sp_sync_read.v | 3.46 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/4. Action Time - Dual Port Async Read SRAM.mp4 | 49.89 MB |
| ~Get Your Files Here !/10. Verilog Memory Design/4. Action Time - Dual Port Async Read SRAM.srt | 6.59 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/4.1 ram_dp_async_read.v | 4.42 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/5. Action Time - Single Port Sync Read ROM.mp4 | 37.72 MB |
| ~Get Your Files Here !/10. Verilog Memory Design/5. Action Time - Single Port Sync Read ROM.srt | 4.78 KB |
| ~Get Your Files Here !/10. Verilog Memory Design/5.1 rom_init.hex | 66 B |
| ~Get Your Files Here !/10. Verilog Memory Design/5.2 rom.v | 1.57 KB |
| ~Get Your Files Here !/11. Verilog State Machines/1. Discover Finite State Machines.mp4 | 33.95 MB |
| ~Get Your Files Here !/11. Verilog State Machines/1. Discover Finite State Machines.srt | 4.23 KB |
| ~Get Your Files Here !/11. Verilog State Machines/2. Action Time - Metro turnstile (Mealy FSM).mp4 | 70.00 MB |
| ~Get Your Files Here !/11. Verilog State Machines/2. Action Time - Metro turnstile (Mealy FSM).srt | 9.91 KB |
| ~Get Your Files Here !/11. Verilog State Machines/2.1 fsm.v | 3.01 KB |
| ~Get Your Files Here !/11. Verilog State Machines/3. Action Time - Special Semaphore (Mealy FSM).mp4 | 103.04 MB |
| ~Get Your Files Here !/11. Verilog State Machines/3. Action Time - Special Semaphore (Mealy FSM).srt | 13.63 KB |
| ~Get Your Files Here !/11. Verilog State Machines/3.1 semaphore_fsm.v | 3.68 KB |
| ~Get Your Files Here !/11. Verilog State Machines/4. Basics of Sequence Detectors.mp4 | 10.48 MB |
| ~Get Your Files Here !/11. Verilog State Machines/4. Basics of Sequence Detectors.srt | 1.10 KB |
| ~Get Your Files Here !/11. Verilog State Machines/5. Action Time - Sequence Detector NON Overlaping.mp4 | 30.89 MB |
| ~Get Your Files Here !/11. Verilog State Machines/5. Action Time - Sequence Detector NON Overlaping.srt | 3.99 KB |
| ~Get Your Files Here !/11. Verilog State Machines/5.1 seq_det_non_overlap.v | 2.32 KB |
| ~Get Your Files Here !/11. Verilog State Machines/6. Action Time - Sequence Detector Overlaping.mp4 | 11.94 MB |
| ~Get Your Files Here !/11. Verilog State Machines/6. Action Time - Sequence Detector Overlaping.srt | 1.55 KB |
| ~Get Your Files Here !/11. Verilog State Machines/6.1 seq_det_overlap.v | 2.37 KB |
| ~Get Your Files Here !/11. Verilog State Machines/7. Verilog Mealy FSM Template.mp4 | 28.15 MB |
| ~Get Your Files Here !/11. Verilog State Machines/7. Verilog Mealy FSM Template.srt | 3.37 KB |
| ~Get Your Files Here !/11. Verilog State Machines/7.1 fsm_template.v | 911 B |
| ~Get Your Files Here !/12. Verilog Design Examples/1. Discover the First In First Out (FIFO) circuit.mp4 | 22.84 MB |
| ~Get Your Files Here !/12. Verilog Design Examples/1. Discover the First In First Out (FIFO) circuit.srt | 2.36 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/2. Action Time - Synchronous FIFO.mp4 | 78.00 MB |
| ~Get Your Files Here !/12. Verilog Design Examples/2. Action Time - Synchronous FIFO.srt | 10.47 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/2.1 fifo_sync.v | 3.52 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/3. Action Time - Data Transfer FSM.mp4 | 108.76 MB |
| ~Get Your Files Here !/12. Verilog Design Examples/3. Action Time - Data Transfer FSM.srt | 14.05 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/3.1 ram_dp_async_read.v | 609 B |
| ~Get Your Files Here !/12. Verilog Design Examples/3.2 tb_top_fsm.v | 3.03 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/3.3 top_fsm.v | 3.57 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/4. Basics of Data Ecryption.mp4 | 25.62 MB |
| ~Get Your Files Here !/12. Verilog Design Examples/4. Basics of Data Ecryption.srt | 3.22 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/5. Action Time - Design a Stream Cypher.mp4 | 112.94 MB |
| ~Get Your Files Here !/12. Verilog Design Examples/5. Action Time - Design a Stream Cypher.srt | 14.54 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/5.1 prng.v | 570 B |
| ~Get Your Files Here !/12. Verilog Design Examples/5.2 secret_message.txt | 110 B |
| ~Get Your Files Here !/12. Verilog Design Examples/5.3 tb_encrypt.v | 4.26 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/5.4 top_encrypt_golden.v | 1.16 KB |
| ~Get Your Files Here !/12. Verilog Design Examples/5.5 top_encrypt.v | 990 B |
| ~Get Your Files Here !/12. Verilog Design Examples/6. Congratulations!.mp4 | 16.48 MB |
| ~Get Your Files Here !/12. Verilog Design Examples/6. Congratulations!.srt | 1.10 KB |
| ~Get Your Files Here !/2. Install the Simulator/1. Discover the Verilog Simulation.mp4 | 17.55 MB |
| ~Get Your Files Here !/2. Install the Simulator/1. Discover the Verilog Simulation.srt | 1.46 KB |
| ~Get Your Files Here !/2. Install the Simulator/2. Install Intel Quartus Prime Lite and Modelsim.mp4 | 19.90 MB |
| ~Get Your Files Here !/2. Install the Simulator/2. Install Intel Quartus Prime Lite and Modelsim.srt | 1.81 KB |
| ~Get Your Files Here !/2. Install the Simulator/3. Action Time - Hello World using Verilog.mp4 | 18.49 MB |
| ~Get Your Files Here !/2. Install the Simulator/3. Action Time - Hello World using Verilog.srt | 3.63 KB |
| ~Get Your Files Here !/2. Install the Simulator/3.1 hello_world.v | 208 B |
| ~Get Your Files Here !/2. Install the Simulator/4. Congratulations!.mp4 | 10.91 MB |
| ~Get Your Files Here !/2. Install the Simulator/4. Congratulations!.srt | 1.17 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/1. Verilog Data types overview.mp4 | 15.37 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/1. Verilog Data types overview.srt | 1.49 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/10. Action Time - Bit-wise operators.mp4 | 13.64 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/10. Action Time - Bit-wise operators.srt | 1.93 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/10.1 bitwise_operators.v | 1.17 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/11. Verilog Operators - Reduction.mp4 | 4.38 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/11. Verilog Operators - Reduction.srt | 784 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/12. Action Time - Reduction operators.mp4 | 14.07 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/12. Action Time - Reduction operators.srt | 1.68 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/12.1 reduction_operators.v | 1.09 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/13. Verilog Operators - Logical.mp4 | 7.85 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/13. Verilog Operators - Logical.srt | 933 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/14. Action Time - Logical Operators.mp4 | 10.07 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/14. Action Time - Logical Operators.srt | 1.22 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/14.1 logical_operators.v | 1.21 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/15. Action Time - Logical Operators usage.mp4 | 15.11 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/15. Action Time - Logical Operators usage.srt | 1.76 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/15.1 logical_operators_usage.v | 1.74 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/16. Verilog Operators - Arithmetic.mp4 | 3.67 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/16. Verilog Operators - Arithmetic.srt | 413 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/17. Action Time - Arithmetic Operators.mp4 | 7.50 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/17. Action Time - Arithmetic Operators.srt | 948 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/17.1 math_operators.v | 1.25 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/18. Verilog Operators - Shift.mp4 | 11.65 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/18. Verilog Operators - Shift.srt | 1.10 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/19. Action Time - Shift Operators.mp4 | 11.59 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/19. Action Time - Shift Operators.srt | 1.48 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/19.1 shift_operators.v | 829 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/2. Action time - sum and product.mp4 | 15.01 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/2. Action time - sum and product.srt | 2.39 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/2.1 sum_product.v | 433 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/20. Verilog Operators - Relational.mp4 | 6.27 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/20. Verilog Operators - Relational.srt | 618 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/21. Action Time - Relational Operators.mp4 | 10.48 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/21. Action Time - Relational Operators.srt | 1.33 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/21.1 relational_operators.v | 507 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/22. Verilog Operators - Equality.mp4 | 10.04 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/22. Verilog Operators - Equality.srt | 1.12 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/23. Action Time - Equality Operators.mp4 | 6.93 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/23. Action Time - Equality Operators.srt | 768 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/23.1 equality_operators.v | 1.15 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/24. Verilog Operators - Conditional.mp4 | 6.69 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/24. Verilog Operators - Conditional.srt | 671 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/25. Action Time - Conditional Operator.mp4 | 12.27 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/25. Action Time - Conditional Operator.srt | 1.29 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/25.1 conditional_operators.v | 648 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/26. Verilog Operators - Concatenation.mp4 | 6.35 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/26. Verilog Operators - Concatenation.srt | 704 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/27. Action Time - Concatenation Operator.mp4 | 13.82 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/27. Action Time - Concatenation Operator.srt | 1.67 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/27.1 concatention_operator.v | 1015 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/28. Verilog Operators - Replication.mp4 | 9.45 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/28. Verilog Operators - Replication.srt | 1023 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/29. Action Time - Replication Operator.mp4 | 16.68 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/29. Action Time - Replication Operator.srt | 1.77 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/29.1 replication_operator.v | 828 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/3. Hardware Description Language data types.mp4 | 15.70 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/3. Hardware Description Language data types.srt | 1.56 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/30. Verilog Operators - Precedence.mp4 | 4.88 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/30. Verilog Operators - Precedence.srt | 709 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/31. Action Time - Operators Precedence.mp4 | 12.56 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/31. Action Time - Operators Precedence.srt | 1.44 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/31.1 operators_precedence.v | 1.22 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/32. Congratulations!.mp4 | 6.37 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/32. Congratulations!.srt | 714 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/4. Action time - Multiple procedures.mp4 | 17.19 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/4. Action time - Multiple procedures.srt | 2.39 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/4.1 easy_verilog_example.v | 10.81 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/5. What are Literal Values.mp4 | 12.29 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/5. What are Literal Values.srt | 1.17 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/6. Action time - Literal values.mp4 | 19.33 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/6. Action time - Literal values.srt | 2.05 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/6.1 literal_values.v | 940 B |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/7. Vectors in Verilog.mp4 | 10.47 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/7. Vectors in Verilog.srt | 1.02 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/8. Action time - Vectors.mp4 | 22.47 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/8. Action time - Vectors.srt | 2.56 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/8.1 easy_vectors_example.v | 1.06 KB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/9. Verilog Operators - Bit-wise.mp4 | 12.01 MB |
| ~Get Your Files Here !/3. Verilog Data Types and Operators/9. Verilog Operators - Bit-wise.srt | 1.56 KB |
| ~Get Your Files Here !/4. Verilog Module/1. Verilog Module - the basics.mp4 | 34.94 MB |
| ~Get Your Files Here !/4. Verilog Module/1. Verilog Module - the basics.srt | 4.03 KB |
| ~Get Your Files Here !/4. Verilog Module/2. Action time - Do your first testbench.mp4 | 29.15 MB |
| ~Get Your Files Here !/4. Verilog Module/2. Action time - Do your first testbench.srt | 4.19 KB |
| ~Get Your Files Here !/4. Verilog Module/2.1 adder8bit.v | 133 B |
| ~Get Your Files Here !/4. Verilog Module/2.2 my_first_testbench.v | 758 B |
| ~Get Your Files Here !/4. Verilog Module/3. Remember!.mp4 | 7.58 MB |
| ~Get Your Files Here !/4. Verilog Module/3. Remember!.srt | 667 B |
| ~Get Your Files Here !/4. Verilog Module/4. What is a Testbench Architecture.mp4 | 9.21 MB |
| ~Get Your Files Here !/4. Verilog Module/4. What is a Testbench Architecture.srt | 1.24 KB |
| ~Get Your Files Here !/4. Verilog Module/5. Discover Time and Waveforms.mp4 | 10.25 MB |
| ~Get Your Files Here !/4. Verilog Module/5. Discover Time and Waveforms.srt | 1.23 KB |
| ~Get Your Files Here !/4. Verilog Module/6. Action Time - Generate Waveforms.mp4 | 16.12 MB |
| ~Get Your Files Here !/4. Verilog Module/6. Action Time - Generate Waveforms.srt | 1.78 KB |
| ~Get Your Files Here !/4. Verilog Module/6.1 waveforms.v | 425 B |
| ~Get Your Files Here !/5. Verilog Design Styles/1. What are HDL Design Styles.mp4 | 13.53 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/1. What are HDL Design Styles.srt | 1.17 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/10. Design a 1bit full_adder.mp4 | 14.62 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/10. Design a 1bit full_adder.srt | 1.58 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/11. Action Time - full_adder structural.mp4 | 17.90 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/11. Action Time - full_adder structural.srt | 2.49 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/11.1 full_adder_structural.v | 1.73 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/12. Action Time - full_adder dataflow.mp4 | 11.14 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/12. Action Time - full_adder dataflow.srt | 1.54 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/12.1 full_adder_dataflow.v | 1.33 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/13. Action Time - full_adder behavioral.mp4 | 18.68 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/13. Action Time - full_adder behavioral.srt | 2.18 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/14. Design a 4bit full_adder.mp4 | 9.56 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/14. Design a 4bit full_adder.srt | 1.18 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/15. Action Time - 4bit_full_adder structural.mp4 | 34.07 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/15. Action Time - 4bit_full_adder structural.srt | 3.83 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/15.1 ripple_adder_4bit_structural.v | 2.94 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/16. Action Time - 4bit_full_adder dataflow.mp4 | 17.30 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/16. Action Time - 4bit_full_adder dataflow.srt | 2.22 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/16.1 ripple_adder_4bit_dataflow.v | 2.53 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/17. Action Time - 4bit_full_adder behavioral.mp4 | 11.41 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/17. Action Time - 4bit_full_adder behavioral.srt | 1.45 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/17.1 adder_4bit_behavioral.v | 1.18 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/18. Congratulations!.mp4 | 8.63 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/18. Congratulations!.srt | 866 B |
| ~Get Your Files Here !/5. Verilog Design Styles/2. Verilog Structural Design.mp4 | 10.24 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/2. Verilog Structural Design.srt | 1.27 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/3. Action Time - half adder structural.mp4 | 22.46 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/3. Action Time - half adder structural.srt | 3.69 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/3.1 half_adder_structural.v | 946 B |
| ~Get Your Files Here !/5. Verilog Design Styles/4. Verilog Dataflow style.mp4 | 7.25 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/4. Verilog Dataflow style.srt | 799 B |
| ~Get Your Files Here !/5. Verilog Design Styles/5. Action Time - half_adder dataflow.mp4 | 18.29 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/5. Action Time - half_adder dataflow.srt | 2.53 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/5.1 half_adder_dataflow.v | 906 B |
| ~Get Your Files Here !/5. Verilog Design Styles/6. Verilog_Behavioral_style.mp4 | 36.23 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/6. Verilog_Behavioral_style.srt | 3.77 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/7. Remember!.mp4 | 6.86 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/7. Remember!.srt | 626 B |
| ~Get Your Files Here !/5. Verilog Design Styles/8. Action Time - Initial Procedures.mp4 | 14.39 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/8. Action Time - Initial Procedures.srt | 1.66 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/8.1 procedures.v | 1.10 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/9. Action Time - half_adder behavioral.mp4 | 13.14 MB |
| ~Get Your Files Here !/5. Verilog Design Styles/9. Action Time - half_adder behavioral.srt | 1.56 KB |
| ~Get Your Files Here !/5. Verilog Design Styles/9.1 half_adder_behavioral.v | 928 B |
| ~Get Your Files Here !/6. Verilog Structural Design/1. What is Structural Design.mp4 | 9.23 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/1. What is Structural Design.srt | 1012 B |
| ~Get Your Files Here !/6. Verilog Structural Design/10. How to implement a multiplexer using tri-state buffers.mp4 | 9.41 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/10. How to implement a multiplexer using tri-state buffers.srt | 1.16 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/11. Action Time - mux_tri-state.mp4 | 15.03 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/11. Action Time - mux_tri-state.srt | 2.43 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/11.1 mux_tristate.v | 784 B |
| ~Get Your Files Here !/6. Verilog Structural Design/12. Discover the 1bit Comparator.mp4 | 6.04 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/12. Discover the 1bit Comparator.srt | 766 B |
| ~Get Your Files Here !/6. Verilog Structural Design/13. Action Time - 1bit_comparator.mp4 | 20.69 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/13. Action Time - 1bit_comparator.srt | 2.96 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/13.1 comparator_1bit.v | 936 B |
| ~Get Your Files Here !/6. Verilog Structural Design/14. Remember!.mp4 | 8.15 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/14. Remember!.srt | 728 B |
| ~Get Your Files Here !/6. Verilog Structural Design/2. Verilog Built-in_Primitives.mp4 | 18.95 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/2. Verilog Built-in_Primitives.srt | 2.04 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/3. Action Time - Built-in_gates.mp4 | 9.75 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/3. Action Time - Built-in_gates.srt | 1.22 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/3.1 built_in_gates.v | 667 B |
| ~Get Your Files Here !/6. Verilog Structural Design/3.2 tb_gates.v | 661 B |
| ~Get Your Files Here !/6. Verilog Structural Design/4. Discover the Multiplexer.mp4 | 22.43 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/4. Discover the Multiplexer.srt | 2.43 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/5. Action Time - 1bit_mux.mp4 | 16.58 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/5. Action Time - 1bit_mux.srt | 2.62 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/5.1 mux_1bit.v | 271 B |
| ~Get Your Files Here !/6. Verilog Structural Design/5.2 tb_mux.v | 506 B |
| ~Get Your Files Here !/6. Verilog Structural Design/6. Discover the Demultiplexer.mp4 | 15.41 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/6. Discover the Demultiplexer.srt | 1.95 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/7. Action Time -1bit_demux.mp4 | 18.95 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/7. Action Time -1bit_demux.srt | 2.58 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/7.1 demux_1bit.v | 224 B |
| ~Get Your Files Here !/6. Verilog Structural Design/7.2 tb_demux.v | 623 B |
| ~Get Your Files Here !/6. Verilog Structural Design/8. The Tri-state buffer.mp4 | 8.40 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/8. The Tri-state buffer.srt | 1.06 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/9. Action Time - tri-state_buffer.mp4 | 10.48 MB |
| ~Get Your Files Here !/6. Verilog Structural Design/9. Action Time - tri-state_buffer.srt | 1.62 KB |
| ~Get Your Files Here !/6. Verilog Structural Design/9.1 tb_tristate.v | 539 B |
| ~Get Your Files Here !/6. Verilog Structural Design/9.2 tristate_buffer_1bit.v | 137 B |
| ~Get Your Files Here !/7. Verilog Combinational Design/1. What is Combinational logic.mp4 | 19.41 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/1. What is Combinational logic.srt | 1.99 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/10. Differentiate between binary encoders and decoders.mp4 | 15.40 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/10. Differentiate between binary encoders and decoders.srt | 1.70 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/11. Action Time - Nbit Decoder.mp4 | 22.50 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/11. Action Time - Nbit Decoder.srt | 2.98 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/11.1 decoder_nbit.v | 968 B |
| ~Get Your Files Here !/7. Verilog Combinational Design/12. How to use multiple binary decoders.mp4 | 9.24 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/12. How to use multiple binary decoders.srt | 1.07 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/13. Action Time - 4to16 binary Decoder.mp4 | 28.74 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/13. Action Time - 4to16 binary Decoder.srt | 4.01 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/13.1 decoder_4to16.v | 1.71 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/14. Action Time - 8to3 Encoder.mp4 | 23.36 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/14. Action Time - 8to3 Encoder.srt | 3.38 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/14.1 encoder_8to3.v | 11.43 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/15. What is a Priority Encoder.mp4 | 16.69 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/15. What is a Priority Encoder.srt | 1.90 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/16. Action Time - Priority Encoder1 4to2.mp4 | 17.89 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/16. Action Time - Priority Encoder1 4to2.srt | 2.44 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/16.1 prio_enc1_4to2.v | 1.15 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/17. Action Time - Priority Encoder2 4to2.mp4 | 17.96 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/17. Action Time - Priority Encoder2 4to2.srt | 2.14 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/17.1 prio_enc2_4to2.v | 11.04 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/18. Discover bus Multiplexers.mp4 | 12.02 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/18. Discover bus Multiplexers.srt | 1.50 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/19. Action Time - mux_4x_nbit.mp4 | 22.68 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/19. Action Time - mux_4x_nbit.srt | 2.81 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/19.1 mux_4x_nbit.v | 1.36 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/2. Discover Continuous assignments.mp4 | 10.67 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/2. Discover Continuous assignments.srt | 1.10 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/20. Discover bus Demultiplexers.mp4 | 8.72 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/20. Discover bus Demultiplexers.srt | 1.27 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/21. Action Time - demux_4x_nbit.mp4 | 29.11 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/21. Action Time - demux_4x_nbit.srt | 3.37 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/21.1 demux_nbit_x4.v | 1.35 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/22. Master the Seven Segment Display Decoder.mp4 | 25.34 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/22. Master the Seven Segment Display Decoder.srt | 2.64 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/23. Action Time - HEX 7segment decoder.mp4 | 32.23 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/23. Action Time - HEX 7segment decoder.srt | 3.16 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/23.1 hex_7seg_decoder.v | 1.67 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/24. How to use digital logic for arithmetic operations.mp4 | 20.25 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/24. How to use digital logic for arithmetic operations.srt | 2.44 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/25. Action time - Design an Arithmetical Logical Unit (ALU).mp4 | 50.86 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/25. Action time - Design an Arithmetical Logical Unit (ALU).srt | 6.61 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/25.1 ALU.v | 3.29 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/26. Remember!.mp4 | 7.22 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/26. Remember!.srt | 628 B |
| ~Get Your Files Here !/7. Verilog Combinational Design/3. Action Time - Continuous assignments.mp4 | 14.38 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/3. Action Time - Continuous assignments.srt | 2.20 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/3.1 some_logic.v | 762 B |
| ~Get Your Files Here !/7. Verilog Combinational Design/4. Action Time - Adder Tree.mp4 | 19.74 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/4. Action Time - Adder Tree.srt | 2.69 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/4.1 adders3.v | 1.09 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/5. Discover Procedural Assignments.mp4 | 19.14 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/5. Discover Procedural Assignments.srt | 1.79 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/6. Action Time - Tree Adder Procedural.mp4 | 16.35 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/6. Action Time - Tree Adder Procedural.srt | 2.26 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/6.1 adders3_procedural.v | 1.42 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/7. Discover the Nbit Adder.mp4 | 7.26 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/7. Discover the Nbit Adder.srt | 767 B |
| ~Get Your Files Here !/7. Verilog Combinational Design/8. Action Time - Nbit Adder.mp4 | 22.21 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/8. Action Time - Nbit Adder.srt | 3.21 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/8.1 adder_nbit.v | 1004 B |
| ~Get Your Files Here !/7. Verilog Combinational Design/9. Action Time - Nbit Comparator.mp4 | 22.60 MB |
| ~Get Your Files Here !/7. Verilog Combinational Design/9. Action Time - Nbit Comparator.srt | 3.03 KB |
| ~Get Your Files Here !/7. Verilog Combinational Design/9.1 comparator_nbit.v | 1.23 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/1. Sequential Logic Basics.mp4 | 25.44 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/1. Sequential Logic Basics.srt | 2.74 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/10. Discover the Shift Register.mp4 | 22.42 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/10. Discover the Shift Register.srt | 2.35 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/11. Action Time - Shift_Reg_PIPO.mp4 | 25.82 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/11. Action Time - Shift_Reg_PIPO.srt | 3.52 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/11.1 shift_reg_pipo.v | 11.22 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/12. Action Time - Shift_Reg_SIPO.mp4 | 33.59 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/12. Action Time - Shift_Reg_SIPO.srt | 4.17 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/12.1 shift_reg_sipo.v | 1.46 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/13. Action Time - Shift_Reg_SISO.mp4 | 20.35 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/13. Action Time - Shift_Reg_SISO.srt | 2.64 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/13.1 shift_reg_siso.v | 1.39 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/14. Action Time - Shift_Reg_PISO.mp4 | 39.98 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/14. Action Time - Shift_Reg_PISO.srt | 5.86 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/14.1 shift_reg_piso.v | 1.55 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/15. Action Time - Shift_Left_Right_Reg.mp4 | 38.64 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/15. Action Time - Shift_Left_Right_Reg.srt | 5.13 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/15.1 shift_left_right_load_reg.v | 2.06 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/16. Discover the Linear Feedback Shift Register.mp4 | 15.48 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/16. Discover the Linear Feedback Shift Register.srt | 1.74 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/17. Action Time - Linear Feedback Shift Register.mp4 | 39.01 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/17. Action Time - Linear Feedback Shift Register.srt | 5.17 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/17.1 lfsr_16.v | 1.26 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/18. Discover Synchronous Counters.mp4 | 19.96 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/18. Discover Synchronous Counters.srt | 2.21 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/19. Action Time - Nbit Counter.mp4 | 23.44 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/19. Action Time - Nbit Counter.srt | 3.26 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/19.1 counter_nbit.v | 1.18 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/2. Action Time - Clocks Generator.mp4 | 29.19 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/2. Action Time - Clocks Generator.srt | 3.90 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/2.1 clkgen.v | 857 B |
| ~Get Your Files Here !/8. Verilog Sequential Design/20. Action Time - Nbit updown Counter.mp4 | 37.34 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/20. Action Time - Nbit updown Counter.srt | 4.79 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/20.1 counter_up_down_load_nbit.v | 2.05 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/21. Action Time - Modulo_N Counter.mp4 | 32.11 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/21. Action Time - Modulo_N Counter.srt | 4.14 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/21.1 counter_modulo_n.v | 1.49 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/22. Discover Digital Frequency Dividers.mp4 | 19.49 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/22. Discover Digital Frequency Dividers.srt | 2.01 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/23. Action Time - Clock Divider Nbit.mp4 | 22.72 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/23. Action Time - Clock Divider Nbit.srt | 3.24 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/23.1 clock_div_nbit.v | 1.78 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/24. Action Time - Clock Divider by 3.mp4 | 36.70 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/24. Action Time - Clock Divider by 3.srt | 4.66 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/24.1 clock_div_3.v | 1.95 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/3. Types of Sequential Digital Logic.mp4 | 19.04 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/3. Types of Sequential Digital Logic.srt | 2.11 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/4. Action Time - The D_Latch.mp4 | 17.42 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/4. Action Time - The D_Latch.srt | 2.39 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/4.1 d_latch.v | 1.04 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/5. Action Time - D_Latch_reset_n.mp4 | 16.49 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/5. Action Time - D_Latch_reset_n.srt | 2.33 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/5.1 d_latch_rstn.v | 1.20 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/6. Basics of edge-triggered logic.mp4 | 27.91 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/6. Basics of edge-triggered logic.srt | 3.27 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/7. Action Time - D_Flip_Flop_sync_rstn.mp4 | 42.07 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/7. Action Time - D_Flip_Flop_sync_rstn.srt | 5.75 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/7.1 d_ff_sync_rstn.v | 1.31 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/8. Action Time - D_Flip_Flop_async_rstn.mp4 | 15.55 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/8. Action Time - D_Flip_Flop_async_rstn.srt | 1.86 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/8.1 d_ff_async_rstn.v | 1.33 KB |
| ~Get Your Files Here !/8. Verilog Sequential Design/9. Remember!.mp4 | 11.43 MB |
| ~Get Your Files Here !/8. Verilog Sequential Design/9. Remember!.srt | 1.04 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/1. Verilog Functions Basics.mp4 | 21.50 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/1. Verilog Functions Basics.srt | 2.12 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/10. Action Time - Verilog Tasks Control Shift Reg.mp4 | 19.04 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/10. Action Time - Verilog Tasks Control Shift Reg.srt | 2.44 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/10.1 task_control_shift_reg.v | 1.85 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/11. Why our code looks like software.mp4 | 14.30 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/11. Why our code looks like software.srt | 1.41 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/12. Action Time - Shift Reg PIPO buggy.mp4 | 39.80 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/12. Action Time - Shift Reg PIPO buggy.srt | 5.07 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/12.1 shift_reg_pipo_buggy.v | 2.45 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/13. Discover Automated Verification.mp4 | 19.87 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/13. Discover Automated Verification.srt | 2.49 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/14. Action Time - ALU self-checking testbench.mp4 | 59.38 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/14. Action Time - ALU self-checking testbench.srt | 6.72 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/14.1 ALU.v | 7.04 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/2. Action Time - Verilog Functions1.mp4 | 12.55 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/2. Action Time - Verilog Functions1.srt | 1.80 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/2.1 function_ex1.v | 588 B |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/3. Action Time - Verilog Functions2.mp4 | 10.24 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/3. Action Time - Verilog Functions2.srt | 1.29 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/3.1 function_ex2.v | 557 B |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/4. Discover Verilog Recursive Functions.mp4 | 15.27 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/4. Discover Verilog Recursive Functions.srt | 1.60 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/5. Action Time - Verilog Functions Factorial.mp4 | 15.70 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/5. Action Time - Verilog Functions Factorial.srt | 2.17 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/5.1 function_ex3.v | 633 B |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/6. Action Time - Verilog Functions Fibonacci.mp4 | 11.40 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/6. Action Time - Verilog Functions Fibonacci.srt | 1.34 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/6.1 function_ex4.v | 688 B |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/7. Action Time - Nbit Comparator Function.mp4 | 28.22 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/7. Action Time - Nbit Comparator Function.srt | 3.67 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/7.1 compare_nbit_func.v | 1.53 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/8. Verilog Tasks Basics.mp4 | 9.95 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/8. Verilog Tasks Basics.srt | 1.12 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/9. Action Time - Verilog Tasks Distance Conversion.mp4 | 10.98 MB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/9. Action Time - Verilog Tasks Distance Conversion.srt | 1.41 KB |
| ~Get Your Files Here !/9. Verilog Functions and Tasks/9.1 task_meters_to_feet.v | 806 B |
| ~Get Your Files Here !/Bonus Resources.txt | 357 B |
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